VLSI VERIFICATION ENGINEER AND EMBEDDED SYSTEM DESIGNER TRAINING OVERVIEW
What is the use of education system that is not affordable to majority of people, it reflects the current education scenario in India. Same is the case with VLSI training. Most of the institutes are charging abnormal fee for teaching basic skill set with few projects. SSSemicon was setup in 2019 with the motto of ‘quality education at affordable fee’.
SSSemicon Training is a VLSI and Embedded Systems Training based out of Bangalore and Hyderabad. SSSemicon was set up in 2019, offers industry standard, high quality, affordable training to graduates who want to make career in VLSI, and Embedded systems. We have supported 200+ students with placements.
SSSemicon is among the very few offering training in complete spectrum of VLSI flow from RTL design, Functional Verification, Formal Verification, and Physical Verification. We also offer courses on AMBA, PCIe, USB, DDR, GLS, Low power verification and SOC verification, customised for experienced engineers.
SSSemicon offers industry’s best embedded system training curriculum, covering all aspects of Embedded systems including training on C, Data Structures, C++, industry standard micro-controllers, Embedded C, Standard peripheral protocols, industry standard boards, Linux drivers, RTOS and projects
SI Front end courses
- Verilog for Design and verification
- VHDL for Design and verification
- Functional verification Courses
- Functional verification training for fresher
- Functional verification training for experienced engineers
- Systemverilg for functional verification
- UVM for functional verification
- VLSI & Embedded Summer Training cum Internship 2020
- Embedded Systems Design Training
SALIENT FEATURES OF TRAINING AT SSSEMICON:
- SSSemicon has a dedicated setup for access to all course videos
- Student provided with access to all course videos from 8AM to 9PM
- Main mode of training remains classroom training, video access is a back up.
- Job opportunity is offered based on performance in evaluation test conducted once every 3 weeks
- Every student who meets minimum performance criteria in evaluation tests(35%+ score) is provided with at least 6 job opportunities
- Student continues to get further support till the time he/she gets placed
Training on complete flow using a complex project
- Reading design specification
- Feature listing down, Scenario listing down
- Test-plan creation
- Testbench architecture development
- Testbench component coding
- Testbench integration
- Sanity testcase coding
- Functional testcase coding
- setting up regression
- Analysis testcase runs using waveform and logs
- Functional & code coverage analysis